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<div class="title">SDIO_TypeDef Struct Reference<div class="ingroups"><a class="el" href="group___peripheral__registers__structures.html">Peripheral_registers_structures</a></div></div>  </div>
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<p>SD host Interface.  
</p>

<p><code>#include &lt;<a class="el" href="stm32f4xx_8h_source.html">stm32f4xx.h</a>&gt;</code></p>
<table class="memberdecls">
<tr><td colspan="2"><h2><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#a65bff76f3af24c37708a1006d54720c7">POWER</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#aa94197378e20fc739d269be49d9c5d40">CLKCR</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#a07d4e63efcbde252c667e64a8d818aa9">ARG</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#adcf812cbe5147d300507d59d4a55935d">CMD</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__I uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#aad371db807e2db4a2edf05b3f2f4b6cd">RESPCMD</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__I uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#a7b0ee0dc541683266dfab6335abca891">RESP1</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__I uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#a4d99c78dffdb6e81e8f6b7abec263419">RESP2</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__I uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#a3da04fbdd44f48a1840e5e0a6295f3cf">RESP3</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__I uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#ac760383de212de696f504e744c6fca7e">RESP4</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#a1dd219eaeee8d9def822da843028bd02">DTIMER</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#a612edc78d2fa6288392f8ea32c36f7fb">DLEN</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#a96a3d1a050982fccc23c2e6dbe0de068">DCTRL</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__I uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#a4273e2b5aeb7bdf1006909b1a2b59bc8">DCOUNT</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__I uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#a7520cdf6f3df68c2f147bdd87fb8a96f">STA</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#a0a8c8230846fd8ff154b9fde8dfa0399">ICR</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#a5c955643593b4aedbe9f84f054d26522">MASK</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#a8be676577db129a84a9a2689519a8502">RESERVED0</a> [2]</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__I uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#ab27b78e19f487c845437c29812eecca7">FIFOCNT</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#a2d531df35272b1f3d787e5726ed5c52c">RESERVED1</a> [13]</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html#a68bef1da5fd164cf0f884b4209670dc8">FIFO</a></td></tr>
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<hr/><h2>Field Documentation</h2>
<a class="anchor" id="a07d4e63efcbde252c667e64a8d818aa9"></a><!-- doxytag: member="SDIO_TypeDef::ARG" ref="a07d4e63efcbde252c667e64a8d818aa9" args="" -->
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<p>SDIO argument register, Address offset: 0x08 </p>

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<a class="anchor" id="aa94197378e20fc739d269be49d9c5d40"></a><!-- doxytag: member="SDIO_TypeDef::CLKCR" ref="aa94197378e20fc739d269be49d9c5d40" args="" -->
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<div class="memdoc">
<p>SDI clock control register, Address offset: 0x04 </p>

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<a class="anchor" id="adcf812cbe5147d300507d59d4a55935d"></a><!-- doxytag: member="SDIO_TypeDef::CMD" ref="adcf812cbe5147d300507d59d4a55935d" args="" -->
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<div class="memdoc">
<p>SDIO command register, Address offset: 0x0C </p>

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<a class="anchor" id="a4273e2b5aeb7bdf1006909b1a2b59bc8"></a><!-- doxytag: member="SDIO_TypeDef::DCOUNT" ref="a4273e2b5aeb7bdf1006909b1a2b59bc8" args="" -->
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          <td class="memname">__I uint32_t <a class="el" href="struct_s_d_i_o___type_def.html#a4273e2b5aeb7bdf1006909b1a2b59bc8">DCOUNT</a></td>
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<div class="memdoc">
<p>SDIO data counter register, Address offset: 0x30 </p>

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<a class="anchor" id="a96a3d1a050982fccc23c2e6dbe0de068"></a><!-- doxytag: member="SDIO_TypeDef::DCTRL" ref="a96a3d1a050982fccc23c2e6dbe0de068" args="" -->
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          <td class="memname">__IO uint32_t <a class="el" href="struct_s_d_i_o___type_def.html#a96a3d1a050982fccc23c2e6dbe0de068">DCTRL</a></td>
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<div class="memdoc">
<p>SDIO data control register, Address offset: 0x2C </p>

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<a class="anchor" id="a612edc78d2fa6288392f8ea32c36f7fb"></a><!-- doxytag: member="SDIO_TypeDef::DLEN" ref="a612edc78d2fa6288392f8ea32c36f7fb" args="" -->
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          <td class="memname">__IO uint32_t <a class="el" href="struct_s_d_i_o___type_def.html#a612edc78d2fa6288392f8ea32c36f7fb">DLEN</a></td>
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<div class="memdoc">
<p>SDIO data length register, Address offset: 0x28 </p>

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<a class="anchor" id="a1dd219eaeee8d9def822da843028bd02"></a><!-- doxytag: member="SDIO_TypeDef::DTIMER" ref="a1dd219eaeee8d9def822da843028bd02" args="" -->
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<div class="memdoc">
<p>SDIO data timer register, Address offset: 0x24 </p>

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</div>
<a class="anchor" id="a68bef1da5fd164cf0f884b4209670dc8"></a><!-- doxytag: member="SDIO_TypeDef::FIFO" ref="a68bef1da5fd164cf0f884b4209670dc8" args="" -->
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          <td class="memname">__IO uint32_t <a class="el" href="struct_s_d_i_o___type_def.html#a68bef1da5fd164cf0f884b4209670dc8">FIFO</a></td>
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<div class="memdoc">
<p>SDIO data FIFO register, Address offset: 0x80 </p>

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<a class="anchor" id="ab27b78e19f487c845437c29812eecca7"></a><!-- doxytag: member="SDIO_TypeDef::FIFOCNT" ref="ab27b78e19f487c845437c29812eecca7" args="" -->
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          <td class="memname">__I uint32_t <a class="el" href="struct_s_d_i_o___type_def.html#ab27b78e19f487c845437c29812eecca7">FIFOCNT</a></td>
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<div class="memdoc">
<p>SDIO FIFO counter register, Address offset: 0x48 </p>

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</div>
<a class="anchor" id="a0a8c8230846fd8ff154b9fde8dfa0399"></a><!-- doxytag: member="SDIO_TypeDef::ICR" ref="a0a8c8230846fd8ff154b9fde8dfa0399" args="" -->
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          <td class="memname">__IO uint32_t <a class="el" href="struct_s_d_i_o___type_def.html#a0a8c8230846fd8ff154b9fde8dfa0399">ICR</a></td>
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<div class="memdoc">
<p>SDIO interrupt clear register, Address offset: 0x38 </p>

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<a class="anchor" id="a5c955643593b4aedbe9f84f054d26522"></a><!-- doxytag: member="SDIO_TypeDef::MASK" ref="a5c955643593b4aedbe9f84f054d26522" args="" -->
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          <td class="memname">__IO uint32_t <a class="el" href="struct_s_d_i_o___type_def.html#a5c955643593b4aedbe9f84f054d26522">MASK</a></td>
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<div class="memdoc">
<p>SDIO mask register, Address offset: 0x3C </p>

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<a class="anchor" id="a65bff76f3af24c37708a1006d54720c7"></a><!-- doxytag: member="SDIO_TypeDef::POWER" ref="a65bff76f3af24c37708a1006d54720c7" args="" -->
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<p>SDIO power control register, Address offset: 0x00 </p>

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<a class="anchor" id="a8be676577db129a84a9a2689519a8502"></a><!-- doxytag: member="SDIO_TypeDef::RESERVED0" ref="a8be676577db129a84a9a2689519a8502" args="[2]" -->
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          <td class="memname">uint32_t <a class="el" href="struct_s_d_i_o___type_def.html#a8be676577db129a84a9a2689519a8502">RESERVED0</a>[2]</td>
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<p>Reserved, 0x40-0x44 </p>

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<a class="anchor" id="a2d531df35272b1f3d787e5726ed5c52c"></a><!-- doxytag: member="SDIO_TypeDef::RESERVED1" ref="a2d531df35272b1f3d787e5726ed5c52c" args="[13]" -->
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          <td class="memname">uint32_t <a class="el" href="struct_s_d_i_o___type_def.html#a2d531df35272b1f3d787e5726ed5c52c">RESERVED1</a>[13]</td>
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<p>Reserved, 0x4C-0x7C </p>

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<a class="anchor" id="a7b0ee0dc541683266dfab6335abca891"></a><!-- doxytag: member="SDIO_TypeDef::RESP1" ref="a7b0ee0dc541683266dfab6335abca891" args="" -->
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<p>SDIO response 1 register, Address offset: 0x14 </p>

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<a class="anchor" id="a4d99c78dffdb6e81e8f6b7abec263419"></a><!-- doxytag: member="SDIO_TypeDef::RESP2" ref="a4d99c78dffdb6e81e8f6b7abec263419" args="" -->
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          <td class="memname">__I uint32_t <a class="el" href="struct_s_d_i_o___type_def.html#a4d99c78dffdb6e81e8f6b7abec263419">RESP2</a></td>
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<p>SDIO response 2 register, Address offset: 0x18 </p>

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<a class="anchor" id="a3da04fbdd44f48a1840e5e0a6295f3cf"></a><!-- doxytag: member="SDIO_TypeDef::RESP3" ref="a3da04fbdd44f48a1840e5e0a6295f3cf" args="" -->
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          <td class="memname">__I uint32_t <a class="el" href="struct_s_d_i_o___type_def.html#a3da04fbdd44f48a1840e5e0a6295f3cf">RESP3</a></td>
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<p>SDIO response 3 register, Address offset: 0x1C </p>

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<a class="anchor" id="ac760383de212de696f504e744c6fca7e"></a><!-- doxytag: member="SDIO_TypeDef::RESP4" ref="ac760383de212de696f504e744c6fca7e" args="" -->
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          <td class="memname">__I uint32_t <a class="el" href="struct_s_d_i_o___type_def.html#ac760383de212de696f504e744c6fca7e">RESP4</a></td>
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<p>SDIO response 4 register, Address offset: 0x20 </p>

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<a class="anchor" id="aad371db807e2db4a2edf05b3f2f4b6cd"></a><!-- doxytag: member="SDIO_TypeDef::RESPCMD" ref="aad371db807e2db4a2edf05b3f2f4b6cd" args="" -->
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          <td class="memname">__I uint32_t <a class="el" href="struct_s_d_i_o___type_def.html#aad371db807e2db4a2edf05b3f2f4b6cd">RESPCMD</a></td>
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<p>SDIO command response register, Address offset: 0x10 </p>

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<a class="anchor" id="a7520cdf6f3df68c2f147bdd87fb8a96f"></a><!-- doxytag: member="SDIO_TypeDef::STA" ref="a7520cdf6f3df68c2f147bdd87fb8a96f" args="" -->
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          <td class="memname">__I uint32_t <a class="el" href="struct_s_d_i_o___type_def.html#a7520cdf6f3df68c2f147bdd87fb8a96f">STA</a></td>
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<p>SDIO status register, Address offset: 0x34 </p>

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<hr/>The documentation for this struct was generated from the following file:<ul>
<li>D:/123/stm32f4_blink_led-1.2.2-120323/inc/<a class="el" href="stm32f4xx_8h_source.html">stm32f4xx.h</a></li>
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